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National Stock Number:
5962-01-265-4735
Federal Supply Class:
5962
National Item Identification Number:
012654735
Description:
MICROCIRCUIT,DIGITAL
Detail:
A microcircuit specifically designed to generate, modify, or process electrical signals which operate with two distinct or binary states. These states are commonly referred to as on and off, true and false, high and low, or 1 and 0.
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Manufacturer Information:
| 352250043142 | H0203 | THALES NEDERLAND B.V. | | 54F243/BCAJC | 04713 | FREESCALE SEMICONDUCTOR, INC. | | 54F243BCXJC | 04713 | FREESCALE SEMICONDUCTOR, INC. | | 54F243DMQB | 07263 | FAIRCHILD SEMICONDUCTOR CORP | | 54F243DMQB | 27014 | NATIONAL SEMICONDUCTOR CORPORATION | | 54F243DM | 27014 | NATIONAL SEMICONDUCTOR CORPORATION | | ES5819-02 | 20418 | DRS SUSTAINMENT SYSTEMS, INC. USE CAGE CODE 98255 FOR CATALOGING | | 5962-86834 | 67268 | DLA LAND AND MARITIME DBA ENGINEERING AND TECHNICAL SUPPORT DIV DOCUMENT STANDARDIZATION DIVISION (STANDARD MICROCIRCUIT | | 5962-8683401BCA | 67268 | DLA LAND AND MARITIME DBA ENGINEERING AND TECHNICAL SUPPORT DIV DOCUMENT STANDARDIZATION DIVISION (STANDARD MICROCIRCUIT | | 5962-8683401BCB | 67268 | DLA LAND AND MARITIME DBA ENGINEERING AND TECHNICAL SUPPORT DIV DOCUMENT STANDARDIZATION DIVISION (STANDARD MICROCIRCUIT | | 5962-8683401BCX | 67268 | DLA LAND AND MARITIME DBA ENGINEERING AND TECHNICAL SUPPORT DIV DOCUMENT STANDARDIZATION DIVISION (STANDARD MICROCIRCUIT | | 5962-8683401CA | 67268 | DLA LAND AND MARITIME DBA ENGINEERING AND TECHNICAL SUPPORT DIV DOCUMENT STANDARDIZATION DIVISION (STANDARD MICROCIRCUIT | | ES5819-02 | 98255 | DRS SUSTAINMENT SYSTEMS, INC | | B99175 | K0967 | MBDA UK LTD | | S54F243F/883B | 18324 | PHILIPS SEMICONDUCTORS INC |
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Techincal Specification:
| BODY HEIGHT | 0.140 INCHES MAXIMUM | | BODY LENGTH | 0.785 INCHES MAXIMUM | | BODY WIDTH | 0.220 INCHES MINIMUM AND 0.310 INCHES MAXIMUM | | CASE OUTLINE SOURCE AND DESIGNATOR | D-1 MIL-M-38510 | | DESIGN FUNCTION AND QUANTITY | 4 TRANSCEIVER | | FEATURES PROVIDED | SCHOTTKY AND 3-STATE OUTPUT AND W/ENABLE | | INCLOSURE CONFIGURATION | DUAL-IN-LINE | | INCLOSURE MATERIAL | CERAMIC | | INPUT CIRCUIT PATTERN | 6 INPUT | | OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS | | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC | | MAXIMUM POWER DISSIPATION RATING | 495.0 MILLIWATTS | | PRECIOUS MATERIAL AND LOCATION | TERMINAL SURFACES OPTION GOLD | | PRECIOUS MATERIAL | GOLD | | STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS | | TEST DATA DOCUMENT | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
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