| JOINT ELECTRONIC DEVICE ENGINEERING COUNCIL/JEDEC/CASE OUTLINE DESIGNATION | T0-220 |
| INTERNAL CONFIGURATION | JUNCTION CONTACT |
| III SEMICONDUCTOR MATERIAL | SILICON |
| INCLOSURE MATERIAL | PLASTIC |
| POWER RATING PER CHARACTERISTIC | 50.0 WATTS SMALL-SIGNAL INPUT POWER, COMMON-COLLECTOR PRESET |
| PROPRIETARY CHARACTERISTICS | PACS |
| MOUNTING FACILITY QUANTITY | 1 |
| MOUNTING METHOD | UNTHREADED HOLE |
| OVERALL HEIGHT | 0.190 INCHES MAXIMUM |
| OVERALL LENGTH | 0.650 INCHES MAXIMUM |
| OVERALL WIDTH | 0.420 INCHES MAXIMUM |
| SPECIAL FEATURES | JUNCTION PATTERN ARRANGEMENT: PNP |
| VOLTAGE RATING IN VOLTS PER CHARACTERISTIC | 80.0 MAXIMUM NOMINAL REGULATOR VOLTAGE |
| TERMINAL TYPE AND QUANTITY | 3 PIN |
| TRANSFER RATIO | 60.0 MINIMUM STATIC FORWARD CURRENT TRANSFER RATIO, COMMON-EMITTER |